Array processor with parallel operations per instruction
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United States of America Patent
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Sep 1, 1981
Grant Date -
N/A
app pub date -
Sep 28, 1979
filing date -
Sep 28, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An array processor particularly useful in performing calculations utilizing data from two distinct two-dimensional arrays. More particularly, the array processor provided by the invention incorporates multiplication, addition, subtraction, transfer and storage means whereby arithmetic and storage operations, and two-dimensional array access operations can be conducted in parallel, thereby reducing the time required for complex and cumulative vector computations which could be associated with voice digital encoding and decoding systems. An architecture scheme is described which allows parallel operations to be effected, and a simplified addressing means is disclosed for vectorally accessing locations within two two-dimensional arrays. In addition, a coding and instruction scheme is disclosed which is compatible with the disclosed architecture.
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