Computer system having a paging apparatus for mapping virtual addresses to real addresses for a memory of a multiline communications controller
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United States of America Patent
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Sep 15, 1981
Grant Date -
N/A
app pub date -
Jan 2, 1979
filing date -
Jan 2, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A paging apparatus includes addressing hardware for addressing a number of physical devices coupled to various communication buses, for mapping virtual addresses to real addresses, and controlling the flow of data. The paging apparatus generates 8 control signals, 5 of which modify a virtual address into a real address of a memory thereby expanding the capabilities of the real address from 256 address locations by an additional 512 address locations. The remaining 3 control signals control the flow of data by enabling or disabling data control apparatus in the physical devices.
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