Test pattern generating apparatus
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United States of America Patent
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Oct 6, 1981
Grant Date -
N/A
app pub date -
Apr 2, 1979
filing date -
Apr 3, 1978
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A test pattern generating apparatus in which a microprogram describing a test pattern to be generated is read for interpretation and execution, address and data patterns are generated by arithmetic operations and a memory control signal is produced, the address and data patterns and the memory control signal being applied to a memory under test. The address pattern is provided to an area inversion control signal generation section to produce an inversion control signal corresponding to the address pattern, by which the data pattern may be inverted and then outputted.
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