Digital video line delay circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4298859
SERIAL NO

06151861

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Shift registers are employed in a video line delay circuit coupling the output of an analog to digital converter to a digital processor in a line scan camera document reading system to permit a prescribed delay in the transmission of data to avoid loss of data appearing on a document prior to the document scan mark which is used for enabling the digital processor.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • NATIONAL COMPUTER SYSTEMS, INC.

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Feilchenfeld, Michal M Pittsburgh, PA 8 222

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation