Refresh system for a dynamic memory
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United States of America Patent
Stats
-
Jan 26, 1982
Grant Date -
N/A
app pub date -
Jan 30, 1980
filing date -
Jan 30, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An electronic apparatus comprises a central processor unit (CPU) for controlling the operation of the electronic apparatus, and a dynamic random access memory (RAM). The CPU develops a refresh control signal for refreshing the memory data stored in the dynamic RAM. An additional refresh control circuit is provided outside of the CPU for developing another refresh control signal. The additional refresh control circuit is connected to receive the electric power from a backup battery included in the electronic apparatus. When the service interruption occurs, the additional refresh control circuit is enabled to maintain the memory data stored in the dynamic RAM.
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