
US Patent No: 4,316,248
Number of patents in Portfolio can not be more than 2000
Memory refresh means including means for providing refresh addresses during power failures
Stats
-
Feb 16, 1982
Issued date -
Nov 5, 1979
filing date -
06/091,318
serial no -
Expired
status
Importance
Loading Importance Indicators...
Abstract
Memory control circuitry is disclosed for providing memory refresh during battery back-up operation. Memory addressing circuitry is connected between circuitry, such as a processor, providing memory refresh addresses, and memory addressing inputs. During normal main power supply operation, refresh addresses are provided to the memory from the processor. Upon occurrence of a main power supply failure, and start of battery back-up operation, the last refresh address provided by the processor is stored in the memory addressing circuitry and successively incremented to provide refresh addresses to the memory .
Loading the Abstract Image...
First Claim
Related Publications
Loading Related Publications...
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
|
|
|||
| 4,218,753 Microcode-controlled memory refresh apparatus for a data processing system | 8 | 1977 | |
|
|
|||
| 4,204,254 Electronic computer including an information refreshing arrangement | 7 | 1978 | |