Memory refresh means including means for providing refresh addresses during power failures
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United States of America Patent
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-
Feb 16, 1982
Issued Date -
N/A
app pub date -
Nov 5, 1979
filing date -
Dec 6, 1978
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Memory control circuitry is disclosed for providing memory refresh during battery back-up operation. Memory addressing circuitry is connected between circuitry, such as a processor, providing memory refresh addresses, and memory addressing inputs. During normal main power supply operation, refresh addresses are provided to the memory from the processor. Upon occurrence of a main power supply failure, and start of battery back-up operation, the last refresh address provided by the processor is stored in the memory addressing circuitry and successively incremented to provide refresh addresses to the memory .
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