Method of making self-aligned device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4319395
SERIAL NO

06053132

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A self-aligned MOS transistor having improved operating characteristics and higher packing density and a method for fabricating the device. Resistance of the gate electrode is reduced substantially by forming the electrode of a metal silicide. Resistance of the source and drain regions is likewise reduced substantially by forming a metal silicide in the doped junction region which allows those regions to be smaller and to require less area. The silicided source and drain regions are self-aligned with and closely spaced to the silicided gate electrode. This is provided by a process which utilizes and makes possible an undercut etching of a polycrystalline silicon gate electrode.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • MOTOROLA, INC.

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barron, Edward W Mesa, AZ 1 65
Holstin, Howard E Tempe, AZ 1 65
Lund, Clarence A Mesa, AZ 7 176
Sugino, Michael D Scottsdale, AZ 3 118

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation