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Abstract

This simulation circuit is a one-port network having a pair of nodes connected to inputs of first and second voltage followers that have associated switched capacitors alternately connected across them for being discharged and connected to an integrator for being charged to the output voltage on the latter. A third switched capacitor is alternately connected in series with the voltage follower outputs for sensing the input voltage applied to the nodes, and connected to the integrator where the input voltage is integrated and transferred to the first and second switched capacitors. A floating inductance L=T.sup.2 C4/C1C3 is simulated across the nodes, where T is the reciprocal of the switching frequency, C1, C2 and C3 are the capacitances of associated switched capacitors, C1=C2, C4 is the capacitance in the integrator, and the circuit is characterized by the LDI transformation.

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First Claim