Method of digital logic simulation
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United States of America Patent
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-
Jul 27, 1982
Grant Date -
N/A
app pub date -
May 13, 1980
filing date -
May 15, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A logic simulation is executed using a real circuit as a part of a simulation model of a logic circuit subjected to the logic simulation. The simulation model is formed of the real circuit and a simulation circuit, and the operation of the real circuit and the logic simulation of the simulation circuit are performed alternately. The operation of the real circuit is performed in response to an input signal thereto representing the condition of the output node of the simulation circuit, while the logic simulation of the simulation circuit is executed in response to a stimulus in the form of an output signal of the real circuit which is applied to the input node of the simulation circuit.
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