Manufacturing semiconductor wafer devices by simultaneous slicing and etching

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4343662
SERIAL NO

06249321

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of forming semiconductor devices incorporates etching during the slicing of a semiconductor ingot from which semiconductor wafers are formed. In addition, a partial slicing through the ingot yields partially cut wafers which are maintained integral beyond a diffusion step. Grinding is then employed to remove unwanted material, to shape, and to accomplish the separation of the wafers. A doped, silicon ingot is used with a solution of sodium hydroxide or potassium hydroxide as the etchant. With the ingot in the [111] type of crystal orientation, the etching proceeds readily adjacent to the slicing cuts to facilitate the slicing, and proceeds slowly elsewhere to minimize material wastage. As a result, the formation of extremely thin wafers with minimal cutting loss is possible.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ATLANTIC RICHFIELD COMPANYLOS ANGELES, CA192

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gay, Charles F Tujunga, CA 10 564

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (5)
6493934 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 0 2001
* 2004/0031,476 Group encapsulated dicing chuck 1 2003
* 2005/0186,761 Group encapsulated dicing chuck 0 2005
* 2007/0068,504 Group encapsulated dicing chuck 1 2006
* 2007/0062,511 Group encapsulated dicing chuck 0 2006
 
SAC CORP. (DE CORP.) (1)
* 4465550 Method and apparatus for slicing semiconductor ingots 4 1984
 
MICRON TECHNOLOGY, INC. (18)
6250192 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 14 1996
* 6119675 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 23 1998
* 6155247 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 13 1999
* 6006739 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 33 1999
6196096 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 8 1999
6401580 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 12 2000
6255196 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 4 2000
6279563 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 0 2000
6427676 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 15 2001
6631662 Apparatus for sawing wafers employing multiple indexing techniques for multiple die dimensions 2 2001
6459105 Apparatus for sawing wafers employing multiple indexing techniques for multiple die dimensions 3 2001
6423616 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 0 2001
6691696 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 7 2001
6578458 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 23 2002
6687990 Sawing method employing multiple indexing techniques and semiconductor device structures fabricated thereby 6 2002
6897571 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions 1 2002
6932077 Method for sawing wafers employing multiple indexing techniques for multiple die dimensions and dicing apparatus 2 2003
7387119 Dicing saw with variable indexing capability 0 2005
 
HITACHI KOKI CO., LTD. (1)
5558571 Portable grinder 24 1994
 
FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. (1)
9048372 Patterning 0 2011
 
SHIN-ETSU HANDOTAI CO., LTD. (1)
* 5494862 Method of making semiconductor wafers 30 1994
 
Strasbaugh (2)
6743722 Method of spin etching wafers with an alkali solution 9 2002
7160808 Chuck for supporting wafers with a fluid 7 2004
 
FLIPCHIP INTERNATIONAL (1)
* 5632667 No coat backside wafer grinding process 31 1995
 
Cambridge Energy Resources Inc (2)
* 8261730 In-situ wafer processing system and method 4 2009
* 2010/0126,489 IN-SITU WAFER PROCESSING SYSTEM AND METHOD 4 2009
 
AT&T LABS, INC. (1)
* 5123996 Crystal growth method and apparatus 1 1991
 
DELPHI TECHNOLOGIES, INC. (1)
* 5461008 Method of preventing aluminum bond pad corrosion during dicing of integrated circuit wafers 36 1994
 
CAMBRIDGE ENTERPRISE LIMITED (1)
8865504 Patterning 0 2011
 
KABUSHIKI KAISHA TOSHIBA (1)
* 5185295 Method for dicing semiconductor substrates using a laser scribing and dual etch process 35 1991
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (1)
* 5529051 Method of preparing silicon wafers 11 1994
* Cited By Examiner