Combined DMOS and a vertical bipolar transistor device and fabrication method therefor

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United States of America Patent

PATENT NO 4344081
SERIAL NO

06139793

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Abstract

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This disclosure relates to an improved DMOS semiconductor type device which can function both as a DMOS (unipolar) type device and as a bipolar transistor device. The DMOS device has two separated source regions of, for example, N+ conductivity and each of these source regions is surrounded by a P- type region, thus providing a pair of channels between each N+ source region and a common N type drain region located between the P- regions. A gate electrode is disposed over both of the channels and functions to permit electrons from the N+ source regions to flow across the P- channels into the common N type drain region when a proper bias is applied to the gate region. Each of the source regions has its own electrode and a separate electrode is provided to each of the P- regions that surround each of the respective N+ source regions. Thus, the DMOS type structure can function as a DMOS device with the electrodes to the source regions serving as source electrodes and the gate electrode functioning to permit electron flow from the separated source regions to a common drain region. Alternatively, one of the electrodes to the N+ source region could function as an emitter (or a source electrode for MOS operation) electrode with the electrode to the surrounding P- region serving as a base electrode. To complete the bipolar vertical transistor, a collector electrode is provided electrically coupled to the N- region. Alternatively, the collector electrode serves as the drain electrode if the device is operated as a DMOS device.

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Patent Owner(s)

Patent OwnerAddress
SUPERTEX INCCALIFORNIA USA CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Blanchard, Richard A Los Altos, CA 334 6868
Choy, Benedict C K Campbell, CA 15 270
Pao, Henry C Los Altos, CA 1 130

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