MOS Integrated circuit structure for discretionary interconnection
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United States of America Patent
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-
Oct 26, 1982
Grant Date -
N/A
app pub date -
Mar 28, 1980
filing date -
Mar 28, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A flexible, symmetrical, MOS integrated circuit structure and layout employing a unit cell approach for customized wiring. Special features include multiple contacts on individual source/drain elements, rectilinear interconnections in the X- and Y- directions, and interconnection underpasses integral with the source and drain regions of the individual devices. The structure is especially applicable to complementary MOS integrated circuits of large complexity.
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