Importance

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Abstract

Edge data codes forming an image to be displayed are entered into a random access memory map at addresses corresponding to the scanline number and pixel number of the edge in the display of the image. The edge codes may be entered into the memory map in any sequence (i.e. the sequence of availability, the sequence of generation, or the sequence of display). The addresses in the map which do not receive edge codes, are filled with zeros. The edge codes are retrieved form the map in display order to form a pixel data stream which in sequentially decoded by a look-up table and advanced through a pipeline latch for providing color and intensity control voltages to a D/A converter. Clocked pulses through a timing gate advance each new decoded edge code into the latch. The zeros between the edge codes are detected and disable the timing gate during the non-transition period between edge codes. Each edge code remains latched during the non-transition period between transitions causing the continuous display thereof during the non-transition period. Predetermined non-zero codes may be separately detected to provide formating control voltages which control other display features such as resolution and color scales. The subject matter of this application relates to the subject matter of U.S. patent application Ser. No. 148,964, entitled Composite Display Device for Combining Image Data and Method, filed May 12, 1980 by the present assignee.

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First Claim