Speech detector circuit for a TASI system

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United States of America Patent

PATENT NO 4365112
SERIAL NO

06131159

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Abstract

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Disclosed is a centralized circuit for determining whether input signals from a plurality of channels are speech which includes memory means in which digital amplitude samples from each of the input channels are stored in real time. A control means then periodically retrieves the samples from the memory in a time faster than real time and produces a series of time compressed input signals which are compared with a variable threshold derived from a stored level for each channel. Moreover, means are disclosed for setting a new threshold whenever the time compressed input signals differs from the old level for a predetermined time, the new level thereafter being stored in place of the previously stored old level.

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Patent Owner(s)

Patent OwnerAddress
DIGITAL PACKET LICENSING512 MAIN STREET SUITE 601 FORT WORTH TX 76102

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
O'Neill, John F Boulder, CO 6 154
Ruether, Peter G Boulder, CO 5 39

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