Liquid crystal display device having redundant pairs of address buses
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United States of America Patent
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-
Jan 11, 1983
Grant Date -
N/A
app pub date -
Dec 16, 1980
filing date -
Dec 20, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Disclosed is a memory device having a plurality of memory cells arranged in a matrix form; address buses connected to the memory cells and forming respective rows of the matrix; and data buses connected to the memory cells and forming respective columns of the matrix. The address buses or the data buses are formed by paired bus lines, and bridge lines are formed between one and the other of the paired bus lines.
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