Differential sample-and-hold circuit
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United States of America Patent
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-
Jan 25, 1983
Grant Date -
N/A
app pub date -
Jan 17, 1980
filing date -
Jan 17, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A high-speed sample-and-hold circuit well suited for fabrication in monolithic form, the circuit including a pair of capacitors used to track a differential analog signal, and at least two switches for connecting the analog signal to the capacitors in a tracking mode, and for isolating the capacitors from the analog signal in a hold mode. In a preferred embodiment of the invention, the switches are diodes and each capacitor is driven differentially through a separate pair of diodes, which are forward-biased in the tracking mode and reverse-biased in the hold mode. Additional circuitry is provided to compensate for variations in characteristics of the diodes due to temperature changes. Furthermore, the effects of capacitive coupling through the diodes in the hold mode are minimized by disconnecting the analog input signal and substituting a signal derived from the held signal stored in the capacitors.
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