I/O Controller for transferring data between a host processor and multiple I/O units
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United States of America Patent
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-
Feb 1, 1983
Issued Date -
N/A
app pub date -
Nov 25, 1981
filing date -
Jul 30, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An I/O controller for transferring data between a host processor and one or more I/O devices. This I/O controller includes a microprocessor, a direct memory access controller and a dual port storage unit, one port of which is coupled to the host processor I/O channel bus and the other port of which is coupled to the microprocessor bus. All data transfers are by way of the dual port storage unit. The I/O controller includes an interleaving mechanism for enabling concurrent performance of two different modes of data transfer between the host processor and the I/O controller. In particular, this interleaving mechanism enables host processor direct program control (DPC) data transfers to be performed at the same time that the I/O controller is busy doing cycle steal data transfers for a block of data. These DPC data transfers are accomplished without interrupting the cycle stealing operations.
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