Power failure early warning circuit for microprocessor with CMOS RAM memory
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United States of America Patent
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Mar 1, 1983
Grant Date -
N/A
app pub date -
Mar 31, 1980
filing date -
Mar 31, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A circuit for preventing data transfers to a RAM by a microprocessor when primary ac power fails also puts the RAM in standby after a period adequate to complete any data transfer started. The sequence is provided by providing a first signal to the microprocessor transfer enable line upon loss of primary power. A second signal is provided for the enable line of the RAM after a predetermined delay but before decay of the dc power to the RAM.
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