Sample and hold circuit
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United States of America Patent
Stats
-
Jun 21, 1983
Issued Date -
N/A
app pub date -
Feb 27, 1981
filing date -
Feb 13, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A sample and hold circuit for producing an output voltage the magnitude of which is representative of the peak magnitude of a sampled input signal. The sample and hold circuit comprises a unity gain amplifier having an input terminal to receive said input signal and a cascoded output section for sourcing current at an output terminal. A discharge circuit is provided which includes a cascoded section for sinking current at said output terminal. Each of said cascoded sections being coupled to a capacitive load for charging or discharging the capacitor respectively to provide said output voltage.
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