Semiconductor memory operable as static RAM or EAROM
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United States of America Patent
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-
Sep 6, 1983
Grant Date -
N/A
app pub date -
Oct 16, 1981
filing date -
Oct 22, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor memory comprises a CMOS flip-flop circuit and a pair of N-channel MNOS (Metal Nitride Oxide Semiconductor) transistors. A first MNOS transistor is connected between a first pair of CMOS transistors and a second MNOS transistor is connected between a second pair of CMOS transistors. The gates of the first and second MNOS transistors are connected to a control signal line. The control signal line is normally maintained at a reference voltage. When an erase pulse of first polarity is supplied to the control signal line, the first and second MNOS transistors are turned ON, so that the memory operates in the static RAM mode. When a write pulse of second polarity is supplied to the control signal line, the data stored in the static RAM mode becomes nonvolatile.
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