Active load pulse generating circuit
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United States of America Patent
Stats
-
Sep 13, 1983
Grant Date -
N/A
app pub date -
Feb 6, 1981
filing date -
Feb 6, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The conduction paths of a first, normally on, transistor and a second, normally off, transistor are connected in parallel between an output line and a circuit point at a first value, of potential. When any one of a plurality of normally non-conducting input signal responsive means coupled to the output line, is enabled, it causes the potential on the output line to be driven to a second value of potential. Means are provided responsive to the potential on the output line for applying a turn-off signal to the first transistor followed by a delayed turn-on signal to the second transistor when the potential on the output line is driven towards the second value of potential and for applying a turn-on signal to the first transistor followed by a delayed turn-off signal to the second transistor when the potential on the output line is being restored to the first value of potential.
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