Apparatus and method for maintaining cache memory integrity in a shared memory environment
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United States of America Patent
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Oct 18, 1983
Grant Date -
N/A
app pub date -
Mar 24, 1981
filing date -
Mar 24, 1981
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing system having a plurality of processors and a plurality of dedicated and shared memory modules. Each processor includes a cache for speeding up data transfers between the processor and its dedicated memory and also between the processor and one or more shared memories. The integrity of the data in each cache with respect to the shared memory modules is maintained by providing each shared memory with a cache monitoring and control capability which monitors processor reading and writing requests and, in response to this monitoring, maintains an accurate, updatable record of the data addresses in each cache while also providing for invalidating data in a cache when it is no longer valid.
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