Multi-processor data communication bus structure
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United States of America Patent
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-
Nov 22, 1983
Grant Date -
N/A
app pub date -
Feb 25, 1981
filing date -
Feb 25, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A bus structure for the interconnection between a data bus capable of transferring a plurality of words and a local bus which can carry only one word. This structure includes latches for storing the plurality of words for simultaneous transfer over the data bus or for sequential transfer over the local bus as required. Control logic operates to perform the necessary control over this interconnection to effect the required operation.
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