Channel interface circuit providing virtual channel number translation and direct memory access
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United States of America Patent
Stats
-
Dec 6, 1983
Grant Date -
N/A
app pub date -
Jun 22, 1981
filing date -
Jun 22, 1981
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The subject channel interface circuit functions to provide a high speed interface between a processor and a data link, which link carries data messages having virtual addresses. The message handler is programmable and serves to translate the header portion of the data message from a virtual address into a hardware memory address, which is used to activate a specific location in the processor memory. The data portion of the data message is then directly inputted to this memory location (i.e., DMA) and the appropriate file pointers are reset. When a complete file is received and stored in memory, the message handler generates a processor interrupt. Thus, the subject message handler performs all the data receiving tasks, including file storage and linking, without requiring the involvement of the associated processor. All known prior art message handler circuits require extensive processor involvement in the data storage operation and thereby significantly reduce the effective data transfer capabilities of the link.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| BELL TELEPHONE LABORATORIES INCORPORATED | 600 MOUNTAIN AVENUE A CORP OF NY MURRAY HILL NJ 07974-2070 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Larson, Allen L | Thornton, CO | 5 | 369 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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