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Abstract

A receiver, for receiving a signal comprising a carrier signal modulated with a digital signal, comprises a circuit for demodulating the received signal to produce an output signal which contains the digital signal. Because of repeated filtering, the digital signal is typically in the form of an approximately sinusoidal signal, which has a component whose frequency is equal to half the basic bit rate of the digital signal: because of noise, this component is subject to considerable timing jitter. To overcome this, the output signal is digitized and applied to a digital correlator, where it is correlated with a reference signal whose frequency is also equal to half the basic bit rate of the digital signal. The reference signal is preferably derived from a phase-locked loop locked to the carrier frequency. The correlator, which is constituted by a microprocessor, determines the instants of time which most nearly coincide with the mean-level crossing points of said component (which instants correspond to transitions between one bit of the digital signal and the next), and also determines successive bit values on the basis of the coincidence determination. The receiver can be used to receive mains-borne signals, i.e. signals transmitted over an electrical power supply network, or radio broadcast signals.

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First Claim