High efficiency inverter and ballast circuits
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United States of America Patent
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-
Feb 7, 1984
Issued Date -
N/A
app pub date -
Dec 14, 1981
filing date -
Dec 28, 1978
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A high efficiency push-pull inverter circuit employing a pair of relatively high power switching transistors is described. The switching on and off of the transistors is precisely controlled to minimize power losses due to common-mode conduction or due to transient conditions that occur in the process of turning a transistor on or off. Two current feed-back transformers are employed in the transistor base drives; one being saturable for providing a positive feedback, and the other being non-saturable for providing a subtractive feedback.
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