Method of mounting a semiconductor element for analyzing failures thereon

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United States of America Patent

PATENT NO 4431967
SERIAL NO

06180011

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Abstract

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A semiconductor chip having its main face coated with an electrically insulating film is encapsulated in a plastic, electrically conducting member disposed on a metallic plate so that the surface of the insulating member is exposed and parallel to the metallic plate. The surface of the insulating film is observed by an optical microscope through a nematic liquid crystal film and a glass slide with a transparent, electrically conducting coating successively disposed on the chip with a DC voltage applied between the conducting coating and the metallic plate.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHATOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nishioka, Tadashi Itami, JP 41 539

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