Input signal responsive pulse generating and biasing circuit for integrated circuits
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United States of America Patent
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Feb 21, 1984
Grant Date -
N/A
app pub date -
Jan 18, 1982
filing date -
Jan 18, 1982
priority date (Note) -
Expired
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Abstract
A signal generating circuit for an integrated circuit device responsive to first and second externally applied input signals occurring at a predetermined time interval in which the performance of a first input signal responsive circuit is made to vary inversely with respect to the performance of other internal signal generating circuits such that internally generated signals will occur at a predetermined time with respect to the external input signals regardless of the influence of variable parameters. Power dissipation of the first input signal responsive circuit also varies inversely with respect to that of other circuits present on the integrated circuit device so that total power dissipation is minimized.
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