Electrically programmable read-only memory stacked above a semiconductor substrate
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United States of America Patent
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Apr 10, 1984
Grant Date -
N/A
app pub date -
Feb 23, 1981
filing date -
Feb 23, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In the disclosed memory, address decode means are integrated into a surface of a substrate, for addressing cells in the memory; an insulating layer covers the address decode means and the substrate; an array of spaced-apart memory cell select lines lie on the insulating layer; and outputs from the address decode means respectively couple through the insulating layer to the select lines. Each cell of the memory is comprised of a pair of the select lines and further includes a resistive means between that pair which irreversibly switches from a relatively high resistance state to a relatively low resistance state upon the application of a threshold voltage thereacross, and the resistance states are representative of the information in the cell.
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