Bit enable circuitry for an image analyzer system
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United States of America Patent
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Apr 10, 1984
Issued Date -
N/A
app pub date -
Aug 12, 1981
filing date -
Sep 10, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Apparatus for analyzing patterns made up of a matrix of points, with each point being represented by a multi-bit digital electrical signal. The apparatus includes a chain of substantially identical serial neighborhood transformtion stages. Each stage includes a plurality of input lines forming an input data bus, with each line carrying a particular bit in a digital electrical signal. The stage includes an analysis circuit portion for analyzing the pattern represented by the digital electrical signals. Selector means coupled to the input data bus are provided for selecting particular bits in the data signal for analysis by each stage. A central controller coupled to the selector means controls the selection of the particular bits in the data signal to be analyzed by each stage.
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