Importance

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Abstract

Capacitors or dual layer metalization interconnects are formed in an integrated circuit utilizing two layers of polycrystalline silicon (22, 24) separated by a thin insulation region (23). The insulation region formed between the two polycrystalline silicon regions has substantially fewer defects than the insulation regions used in prior art techniques due to the use of a unique process wherein the polycrystalline silicon layer (24) overlying the insulation layer (23) protects the insulation layer from attack during subsequent processing. An improved dielectric strength is provided by forming the insulation region (23) utilizing composite layers of silicon oxide (23a, 23c) and silicon nitride (23b).

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First Claim