Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator

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United States of America Patent

PATENT NO 4460835
SERIAL NO

06260994

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Abstract

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A mode switching transistor which is controlled by a chip enable signal is connected between a power supply terminal and a MOS inverter including transistors. The transistor functions as a weak depletion or depletion type MOS transistor to provide sufficient current with a first back gate bias given in an active mode and functions as a perfect enhancement type transistor to completely cut off current with a second back gate bias given in a standby mode.

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Patent Owner(s)

Patent OwnerAddress
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA A CORP OF JAPAN72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Masuoka, Fujio Yokohama, JP 412 6771

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