Method and apparatus for generating a noiseless sliding block code for a (2,7) channel with rate 1/2
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United States of America Patent
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Jul 31, 1984
Grant Date -
N/A
app pub date -
Dec 31, 1981
filing date -
Dec 31, 1981
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An algorithm and the hardware embodiment for producing a run length limited code useful in magnetic recording channels are described. The system described produces sequences which have a minimum of 2 zeros and a maximum of 7 zeros between adjacent 1's. The code is generated by a sequential scheme that maps 1 bit of unconstrained into 2 bits of constrained data. The encoder is a finite state machine whose internal state description requires 3 bits. It possesses the attractive feature of reset data blocks which reset it to a fixed state. The decoder requires a lookahead of three future channel symbols (6 bits) and its operation is channel state independent. The error propagation due to a random error is 3 bits. The hardware implementation is extremely simple and can operate at very high data speeds.
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