Register arithmetic device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 31, 1984
Grant Date -
N/A
app pub date -
Jul 20, 1981
filing date -
Jul 22, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An arithmetic device having successive arithmetic registers connected in cascade, with buffer registers at each end of the cascade. An information exchange circuit bidirectionally connected to all the arithmetic registers for controlling information transfer therebetween such that the first register is connected to all of the other registers and every other register is also connected to a preceding and a succeeding register.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully