Importance

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Abstract

First of all, this invention relates to a process based on the comparison of the image of a reference object I.sub.ref with the image of an object to be inspected I.sub.exa. Images I.sub.ref and I.sub.exa are picked-up, sampled, discretized and thresheld to produce electronic or binary images I.sub.REF and I.sub.EXA, respectively. These images are cleaned, then centered, I.sub.REF is adjusted to the minimum dimensional tolerances and becomes (I.sub.REF).sub.min. For each image point (pixel), the adjustment is performed by using a structuring element of variable size, the size of which is controlled by a bus from the data contained in a memory unit which take the location of the pixel on the reference object, into account. (I.sub.REF).sub.min is compared to I.sub.EXA which ensures the following function: [(I.sub.REF).sub.min OR I.sub.EXA ]EXCL. OR I.sub.EXA. The resulting image is the image of the 'lack' type defects (which does not appear in I.sub.exa with respect to I.sub.ref). Each defect is studied in a defect analysis unit which computes the dimensions of the defect and compares these dimensions with the maximum allowed size of the defect in this location. For this purpose, this circuit uses the reject criteria for this location, which are contained in a memory unit. The processing operations (adjustment and analysis) and the production of the corresponding data contained in the memory, are synchronized by count and delay circuits. The binary result (accepted/rejected) is available on a line. The defects of the 'spreading' type are processed in the same way. The logic level of the line which is connected to a computer, determines the final decision (accepted/rejected). This invention also relates to an apparatus and circuits for carrying out the described process. This invention can be more particularly used in manufacturing semiconductors (masks, modules, chips, . . . ).

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First Claim