Importance

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Abstract

In accordance with one embodiment of this invention, the second pulse P2 of pulse pair P1, P2 on a disk memory servo track is used as the optional pulse which conveys information relating to the status of the track. In this manner, the possibility of erroneous data being read due to variations in the speed of rotation of the disk is substantially minimized as compared with prior art systems. Furthermore, in accordance with one embodiment of this invention, the determination of whether the servo track pulses comprise the pulse pair P1, P2 or other pulses, as well as analysis of the data from a plurality of pulse pairs P1, P2, is performed by a simple and inexpensive hardware circuit which is capable of utilizing a simple, inexpensive yet highly reliable fixed frequency clock in place of the rather expensive phase lock loop circuit typically used in the prior art. In accordance with another embodiment of this invention, a unique clocking circuit is utilized wherein selected clock pulses provided by the clock generator are selectively delayed as required in order to synchronize the clock pulses with data being read from the servo track. In this manner, the clock remains synchronized with the servo track data even during periods when the speed of rotation of the servo disk fluctuates.

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First Claim