Parallel cyclic redundancy checking circuit
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United States of America Patent
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-
Feb 5, 1985
Grant Date -
N/A
app pub date -
Aug 25, 1982
filing date -
Aug 25, 1982
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A parallel cyclic redundancy checking circuit which determines the validity of digital, binary, cyclical data. The parallel structure of this circuit enables it to check high frequency data. Shift registers are used to store sequentially occurring parallel groups of data and a feedback network comprising exclusive-or gates provide a coding arrangement which produces a resultant data pattern to indicate the validity of the cyclical parallel input data.
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