Memory circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 19, 1985
Grant Date -
N/A
app pub date -
Sep 29, 1982
filing date -
Sep 29, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A memory circuit capable of detecting that refresh operation is surely ended is disclosed. The memory circuit comprises a memory cell matrix, a dummy array sharing rows with the memory cell matrix and similar column structure to the memory cell matrix, and means coupled to a pair of digit lines of the dummy array for detecting that a potential at either of the pair of digit lines in the dummy array reaches an amplified low level.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully