Chipset synchronization arrangement
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United States of America Patent
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-
Apr 30, 1985
Grant Date -
N/A
app pub date -
Aug 1, 1983
filing date -
Aug 1, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Each chip of a microprocessor chipset is synchronized by an associated controller which adjusts a control signal for controlling the delay of a variable delay circuit during each operating cycle. The controller tailors the control signal for each chip by an op-amp which compares the output of an internal clock in each chip with a reference system clock.
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