Semiconductor memory device

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United States of America Patent

PATENT NO 4546457
SERIAL NO

06439591

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Abstract

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A metal-insulator semiconductor dynamic memory device comprising sense amplifiers arrayed on a semiconductor substrate and column decoders. Each of the column decode being provided for a plurality of sense amplifiers and selecting one or more sense amplifiers from the plurality of sense amplifiers, the column decoders being dispersed on both sides of the arrayed sense amplifiers. A plurality of control signal lines which, in order to select the sense amplifiers, control gate elements connected between bit lines connected to the sense amplifiers and data bus lines and which are disposed on both sides of the arrayed sense amplifiers. Conducting lines are also disposed between the sense amplifiers and deliver signals from the control signal lines, for selecting sense amplifiers to the gate elements on the opposite side of the control signal lines with regard to the arrayed sense amplifiers.

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Patent Owner(s)

  • FUJITSU LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nozaki, Shigeki Kawasaki, JP 23 242
Takemae, Yoshihiro Yokohama, JP 162 3346

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