Noise-free, die area efficient cascode circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 4550291
SERIAL NO

06538377

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

In a circuit in which a common-source junction field effect transistor (JFET) is cascoded with a JFET element, current diversion or division circuits are used to divert a majority of the current passing through the input amplifier stage so that it bypasses the cascode FET without compromising the primary circuit function. The bypassing function is achieved by a current mirror, a current mirror-like circuit, or similar devices such as current sources, current splitters and the like and the circuits may be ratioed to more precisely control the bypass current by the use of emitter area scaling, ratioed emitter degeneration resistors, or both. The resultant cascode circuit is relatively noise-free and can easily be implemented into a monolithic integrated circuit without using excess or unrealistic die areas. Another advantage is that the current dividers or diverters make it easier to bias the cascode FET and a further advantage is that the same techniques can be applied with other than JFET amplifier elements, and with other amplifier devices, differential stages, plural stages, and the like.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
BURR BROWN RESEARCH CORPORATION A CORP OF AZTUCSON AS

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Graeme, Jerald G Tucson, AZ 9 117
Millaway, Steven D Tucson, AZ 4 31

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation