Importance

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Abstract

A trunk controller and processor arrangement for measuring packet transmission delay from a first trunk controller through a packet switching network to a second trunk controller. Packets comprising logical addresses and voice/data information are received from high-speed trunks and are communicated through the network to destination trunk controllers which are also attached to high-speed trunks. During initial call setup of a particular call, the central processor associated with the network stores the necessary logical to physical address information in the two controllers associated with that call. The associated controllers then perform all logical to physical address translation on subsequent packets of the call. Each trunk controller comprises a delay monitoring circuit which is responsive to a packet received from the attached trunk to assemble a new switch packet consisting of the arrival time, the physical address, and the received packet for transmission through the network to a destination trunk controller. When a switch packet is received from the switching network by a trunk controller, the delay monitoring circuit of that trunk controller calculates the transmission delay time resulting from the transmission of the packet from the sending trunk controller to the destination trunk controller. The delay monitoring circuit then uses this information to calculated a transmission delay sum for a predefined number of packets. After the predetermined number of packets have been received, the monitoring circuit determines whether the transmission delay excursions have increased or decreased in the excess of a multitude of predetermined percentages of transmission delay and notifies the associated processor if such excursions have occurred. At initialization time and as required during system operation, the processor determines the predetermined percentages of transmission delay which are the standards utilized by the trunk controller.

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First Claim