Matrix multiplier with normalized output

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United States of America Patent

PATENT NO 4553220
SERIAL NO

06496240

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Abstract

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A matrix multiplier having application to a real time computer-generated imagery or graphics system, wherein the output of the multiplier is normalized to increase both the accuracy and speed by which a three dimensional object can be displayed on a video stream. The output of the matrix multiplier is typically a plurality of multiple (e.g. 32 or more) bit serial data screen. Each data stream is normalized to itself and to each of the other of the plurality of data streams which form the product of the matrix multiplication. That is, a particular segment (e.g. 16 bits) of each data stream is selected for continued processing in order to efficiently and accurately define an object in three dimensional space. The selection of each data stream segment is dependent upon the bit pattern thereof and, more particularly, upon the occurance of a pair of successive bits of opposite polarity relative to one another. Accordingly, in the event that many streams of data contain respective bit patterns wherein a large number of the most significant bits are all of the same polarity, the data streams are normalized or shifted by an identical number of bit positions, wherein some of the most significant bits thereof are discarded while the lesser significant bits are retained. Thus, the data streams are scaled to provide representative data words of both reduced size and maximized precision.

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Patent Owner(s)

Patent OwnerAddress
REDIFUSSION COMPUTER GRAPHICS INC A CORP OF DE10060 WILLOW CREEK ROAD SAN DIEGO CA 92131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Swanson, William E San Diego, CA 5 104

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