Offset voltage correction network for instantaneous floating point amplifier
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United States of America Patent
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-
Nov 19, 1985
Grant Date -
N/A
app pub date -
Sep 29, 1982
filing date -
Sep 29, 1982
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Disclosed is an instantaneous floating point amplifier which continuously generates an offset correction voltage level for each possible gain word controlling an internal cascaded amplifier. The offset voltage levels are digitized and stored until an input data signal is received. A portion of the output analog-to-digital converter system for the floating point amplifier is utilized on a time sharing basis to regenerate an analog offset correction voltage. The offset correction voltage is input into a summing network inserted into the amplifier circuit between internal preamplifier and amplifier components. When the input signal has been grounded, the offset correction voltage is disconnected from the input summing network and the floating point amplifier is cycled through its gain operations.
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