Importance

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Abstract

A carrier current transceiver includes a transmitter section and a receiver section coupled to an AC power line. In the transmit mode, input data in the form of a logical '0' enables a carrier frequency signal to excite a tuned cavity. The tuned circuit includes a first winding of transformer, a capacitor and a damping resistor. A second winding of the transformer is capacitively coupled to the AC power line to produce a stepped down carrier current signal to represent a transmitted logical '0'. A logical '1' is represented by absence of the carrier current signal. In the receive mode, a small carrier current signal representing a logical '0' is received via the AC line and is stepped up by the transformer and capacitively coupled to an input of the receiver section. Outband frequencies are removed by means of a second tuned circuit and the resulting signal is amplified by self-biased CMOS inverter circuitry and then is limited by a diode limiter circuit before being input to a phase locked loop data recovery circuit that produces a logical '0' if the carrier frequency is applied for a predetermined period. The damping resistor critically damps large oscillations produced in the first tuned circuit by large noise impulses on the AC line to prevent such oscillations from enduring long enough to be detected as logical '0's by the phase locked loop data recovery circuit.

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First Claim