Non-volatile semiconductor memory circuits
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United States of America Patent
Stats
-
Dec 10, 1985
Grant Date -
N/A
app pub date -
Aug 24, 1982
filing date -
Aug 25, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Memory circuits having a floating gate transistor as a non-volatile storage element are constructed with a shunt transistor across the floating-gate transistor which in the event of a short circuit between the floating gate and the transistor substrate causes the memory to go into a predetermined fail-safe condition. The circuits are cross-coupled flip-flops with a driver and a complementary driver or load connected in series in each of the circuits, one driver or complementary driver or load being a floating gate transistor such as a FATMOS. Short circuiting of the floating gate to the control gate of the floating-gate transistor gives the same fail-safe condition.
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