Unitary phase and frequency adjust network for a multiple frequency digital phase locked loop

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United States of America Patent

PATENT NO 4573017
SERIAL NO

06567724

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Abstract

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A unitary phase and frequency adjust network for use in a multiple frequency digital phase-locked loop circuit is described. The unitary phase and frequency adjust network utilizes a single circuit to effect both phase and frequency adjustments. The multiple frequency digital phase-locked loop effects phase adjustments by selectively combining or subtracting a reference clock signal with a derived programmable clock signal thereby generating a composite digital phase-locked loop clock signal. The phase and frequency adjust network effects frequency shifts by selectively adding or subtracting pulses from the composite clock signal at a rate determined by a programmably controlled clock signal.

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Patent Owner(s)

Patent OwnerAddress
MOTOROLA INC1303 EAST ALGONQUIN ROAD SCHAUMBURG IL 60196 U S A

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Levine, Stephen N Chicago, IL 29 1311

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