Receiver for digital signals
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United States of America Patent
Stats
-
Mar 11, 1986
Grant Date -
N/A
app pub date -
Mar 23, 1984
filing date -
Mar 23, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A digital receiver (40) includes a differential amplifier (42) providing data signal E and a control signal F. The level of the control signal F is related to the average level of the data signal E. A slicing circuit 44 includes series connected transistors (46, 48), the gates of which receive the data signal E. A third transistor (52) is connected to provide hysteresis to the slicing circuit, and a fifth transistor (54) is connected in parallel with the third transistor (52). The control electrode of the transistor (52) receives the control signal F from the differential amplifier (42).
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