Demand paging scheme for a multi-ATB shared memory processing system
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United States of America Patent
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Mar 18, 1986
Grant Date -
N/A
app pub date -
Jul 11, 1983
filing date -
Jul 11, 1983
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Disclosed is a demand paging scheme for a shared memory processing system that uses paged virtual memory addressing and includes a plurality of address translation buffers (ATBs). Page frames of main memory that hold pages being considered for swapping from memory are sequestered and flags, one corresponding to each ATB in the system, are cleared. Each time an ATB is flushed, its associated flag is set. Setting of all the flags indicates that the address translation information of pages held by selected sequestered page frames does not appear in any ATB and that the selected pages may be swapped from main memory.
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