US Patent No: 4,590,552

Number of patents in Portfolio can not be more than 2000

Security bit for designating the security status of information stored in a nonvolatile memory

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Abstract

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A digital processing device implemented on a single semiconductor substrate includes an nonvolatile memory for the storage of data and instructions that define operations on the data. The memory is connected to an inhibit logic interface which is in turn connected to an information bus. The information bus is connected to a central processor that performs the operations on data. An external interface is also connected to the information bus to provide information on the information bus to external devices. At least one security bit is provided for designating security status of information stored in the memory. Address logic is connected to the information bus to determine when information is being accessed from the memory. Security control circuitry is also provided and is connected to the central processing unit, the address logic, to determine when an instruction is being fetched by the central processing unit and if the instruction is being fetched from the memory. The security control circuitry is connected to the inhibit logic interface to inhibit the information bus interface to the memory during selected operations in the central processing unit.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
TEXAS INSTRUMENTS INCORPORATEDDALLAS, TX18205

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Guttag, Karl M Missouri City, TX 149 5482
Nussrallah, Steve Alpharetta, GA 4 297

Cited Art Landscape

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Patent Citation Ranking

Forward Cite Landscape

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